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Synchronous Phase Shifter

IP.com Disclosure Number: IPCOM000096362D
Original Publication Date: 1963-Apr-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Clapper, GL: AUTHOR

Abstract

The circuit generates output pulses which correspond in frequency to AC input signals and are synchronized in phase with a start signal.

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Synchronous Phase Shifter

The circuit generates output pulses which correspond in frequency to AC input signals and are synchronized in phase with a start signal.

A source of AC input signals 30 is connected to a four-stage binary counter 10 by way of clipping amplifier 31, detector 32 and pulse generator 33. Binary counter 10 is reset to zero each time the AC input signals reach their zero voltage crossing point. Multivibrator 15 supplies sequence of pulses to counter
10. As soon as the counter reaches full count, the supply of pulses to the counter is interrupted at gate 17. Integrator 26 is controlled in accordance with the time interval during which the counter remains at full count before being reset to zero. Integrator 26 acts upon multivibrator 15 in a balancing manner to adjust its frequency with respect to the AC input frequency. Thus, synchronization of the multivibrator frequency with the AC input frequency will result in the counter being cyclically advanced to its full count and reset to zero in equal time increments.

A start pulse from source 40 indicates, over gating circuit 41, the transfer of the momentary binary value of counter 10 over transfer circuit 43 into register 52. Comparing circuit 53, connected to the counter and to the register, produces an output pulse on line 54 at this time and at each succeeding time when the momentary binary value is again stored in the counter. Output 58 of gating circuit 56 is applied to bistable trigger 59. T...