Browse Prior Art Database

Binary Gated Trigger

IP.com Disclosure Number: IPCOM000096400D
Original Publication Date: 1963-May-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Jones, JC: AUTHOR

Abstract

This is a binary gated trigger which operates in binary convention and is adapted for gating by one or two signals. The AC set input is a series of pulses which it is desired to count during given time intervals. The time intervals are determined by the gate signals applied to input terminals 1 and 2.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Binary Gated Trigger

This is a binary gated trigger which operates in binary convention and is adapted for gating by one or two signals. The AC set input is a series of pulses which it is desired to count during given time intervals. The time intervals are determined by the gate signals applied to input terminals 1 and 2.

Diodes D2 and D4 provide the paths for the trigger to gate itself. Diodes D1 and D3 provide paths for external signals to gate the trigger. With both inputs conditioned in an up state, the trigger output is a binary count of the AC set input pulses. If either input 1 or 2 goes negative, the turning on-of the gated transistor causes the trigger to stop counting.

This trigger is particularly adapted for use as a redundancy checking device in a serial type data transmission system.

1

Page 2 of 2

2

[This page contains 2 pictures or other non-text objects]