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Timing Circuit

IP.com Disclosure Number: IPCOM000096478D
Original Publication Date: 1963-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

McCullough, JW: AUTHOR

Abstract

The circuit provides stable time out intervals raging from approximately twenty seconds to two minutes. The time interval shown is for thirty seconds.

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Timing Circuit

The circuit provides stable time out intervals raging from approximately twenty seconds to two minutes. The time interval shown is for thirty seconds.

Transistors T1 and T2 are connected in a singleshot multivibrator configuration and function to discharge timing capacitor CT. Capacitor CT is discharged in a relatively short period of time compared to the time out interval. The input signal is applied to terminal A.

When the singleshot time out is completed, T2 turns off, allowing capacitor CT to charge through the current source transistor T3.

When capacitor CT reaches a voltage set by the divider arrangement in the emitter circuit or transistor T4, transistor T4 turns on. The falling collector voltage or T4 is coupled to the base or T5, initiating the turnon or T5. The rising collector voltage of T5 is coupled back to the base or T4 to cause a fast positive start at output terminal K.

This circuit can be recycled at any time by applying another input signal to input terminal A. Such switches transistor T2 on to discharge capacitor CT. Then, the charging or capacitor CT starts over again. The time interval or the singleshot is very short compared to the time interval for charging CT.

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