Browse Prior Art Database

Data Flow Control System

IP.com Disclosure Number: IPCOM000096482D
Original Publication Date: 1963-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 65K

Publishing Venue

IBM

Related People

Meade, RM: AUTHOR [+2]

Abstract

This system is interposed between a plurality of sources of data and a plurality of data sinks or receivers and controls the flow of data between them. Such data modifications are made as the control system is programmed to effect.

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Data Flow Control System

This system is interposed between a plurality of sources of data and a plurality of data sinks or receivers and controls the flow of data between them. Such data modifications are made as the control system is programmed to effect.

A data processing system includes sources of data 1, 2 and 3 together with data sinks or receivers 4, 5 and 6. Between the sources and sinks are a plurality of logic units 7... 11. Each is capable of performing logical operations on the data presented to it and passing the modified data to its output lines. Each logical unit has one or more input registers R settable by input data and at least one gate G for each register R. Gates G are settable to connect a data output source, either a source 1, 2, or 3 or a logic unit 7... 11, when functioning as a source, to a register R. Each register R has one bit position settable to a valid data condition when the register has received data and resettable when the data has been transferred through its logic unit. There are enough gates interconnecting the logic units, the sources, and the sinks so that data can be transferred from any source to any data sink through the logic units needed to perform en route such data modifications as are desired.

Each source, logic unit, and sink generates signals indicating its condition of readiness, the validity of its data and similar information signals. All of these signals are transmitted through cable 12 to Advance Generator 13. Generator 13 provides a signal for each gate G. This allows the gate to pass data into its connected register R and simultaneously sets the valid data bit position of the register. Generator 13 also receives signals from Program Control 14, set by Instruction Unit 15 in accordance with instructions stored in Memory 16. These signals identify the gates which can be energized and, hence, the data path or...