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Magnetic Analog to Digital Converter

IP.com Disclosure Number: IPCOM000096618D
Original Publication Date: 1963-Aug-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Erickson, JJ: AUTHOR

Abstract

In this analog to digital converter employing magnetic-transistor circuitry, an analog signal Xo is applied to the input of the converter at stage 1. Each stage, as stage 1, has a pair of square loop magnetic cores 11 and 13 and a current steering transistor switch 15. Core 11 functions as a signal transfer and 2X multiplier circuit. Core 13 provides a decision function based on a comparison of the input signal with a reference signal. Cores 11 and 13 are normally biased off by signal reference levels R and 3R/2, respectively.

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Magnetic Analog to Digital Converter

In this analog to digital converter employing magnetic-transistor circuitry, an analog signal Xo is applied to the input of the converter at stage 1. Each stage, as stage 1, has a pair of square loop magnetic cores 11 and 13 and a current steering transistor switch 15. Core 11 functions as a signal transfer and 2X multiplier circuit. Core 13 provides a decision function based on a comparison of the input signal with a reference signal. Cores 11 and 13 are normally biased off by signal reference levels R and 3R/2, respectively.

Upon application of a strobe pulse of magnitude R to drive line 17 common to all cores, the input signal Xo is transferred via winding 19 to the summation network of stage 2. Concurrently core 13 compares input signal Xo with R/2 to control the transfer of current from switch 15 to one of two sets of bias windings 21 and 23 or 25 and 27 of cores 11' and 13', respectively, of stage 2. If Xo >/- R/2, a transfer signal of amplitude -R is transferred to the summation network of stage 2. An indication that bit 2/n/ = 1 is provided on lines 29, 31.

If Xo < R/2, then a signal y = 0 is transferred to the summation network of stage 2 and an indication that bit 1 = 0 is provided on lines 29 and 31. The signal resulting from the summation network of stage 2 (X2 + y) initiates a similar action in stage 2, where it is compared with R/2. The process continues in each stage of the converter until the last stage is 2/n-...