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Browse Prior Art Database

Current Switch Latch

IP.com Disclosure Number: IPCOM000096663D
Original Publication Date: 1963-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Antipov, I: AUTHOR [+2]

Abstract

This latch employs transistors and resistors and does not either utilize cross coupling feedback connections or require a separate reset pulse. It is operable in current switching manner to latch information in less than five nanoseconds.

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Current Switch Latch

This latch employs transistors and resistors and does not either utilize cross coupling feedback connections or require a separate reset pulse. It is operable in current switching manner to latch information in less than five nanoseconds.

The latch has current switching circuits 1...4 and an emitter follower Or 5 for producing the latch output. Or 5 has transistors T1 and T2 to receive as inputs the dot-ORed outputs from circuits 1-2 and 3-4, respectively. Circuits 1...4 receive a data input X, a clock input Y and a feedback input A indicative of the previous state of the latch.

Ordinarily, dot-ORing of the outputs of current switching circuits takes place with the same phase signal. For example, the outputs from circuits 3 and 4 are dot-ORed and they are the in-phase outputs from these circuits. This latch employs dot-ORing of the out-of-phase output from circuit 1 with the in-phase output from circuit 2. By utilizing this connection, one inverter stage of logic for providing the Y function is eliminated.

In operation, Y is normally at its negative level and the circuit is latched to store information indicated by the output signal. When Y goes to its positive level, new information in the form of the X signal is entered into the latch. If Y again goes negative, the latch stores the information manifested by the X signal due to the feedback connection providing the A input. This storage condition remains until Y again goes to its more positi...