Browse Prior Art Database

Hammer Check Logic

IP.com Disclosure Number: IPCOM000096700D
Original Publication Date: 1963-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Martin, VC: AUTHOR

Abstract

Higher speed operation of a chain printer, having buffer core storage 20 and checking circuitry including a print error check core plane 76 and an equal check core plane 60 such as described in Patent No. 3,066,601, is realized. This is achieved by eliminating the hammer fire check core plane and adding an equal check delay plane 61 and checking circuitry 65. This utilizes planes 60 and 61 to provide a four stage binary counter for permitting checking of the hammer fire and logic circuit functions up to the fourth print cycle after a hammer fires or should have fired.

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Hammer Check Logic

Higher speed operation of a chain printer, having buffer core storage 20 and checking circuitry including a print error check core plane 76 and an equal check core plane 60 such as described in Patent No. 3,066,601, is realized. This is achieved by eliminating the hammer fire check core plane and adding an equal check delay plane 61 and checking circuitry 65. This utilizes planes 60 and 61 to provide a four stage binary counter for permitting checking of the hammer fire and logic circuit functions up to the fourth print cycle after a hammer fires or should have fired.

A core in plane 60 is reset to 0 from the initial 1 condition by a signal from print compare 48. Such occurs over line 58 whenever a character is to be printed. A signal is applied over line 55 to fire the hammer, resulting in a signal over line 59 whenever the addressed hammer fires. An equal check latch 67 is reset at the beginning of each R1 time and is set by an output from the equal check sense amplifier later in R1 time, if there is a 1 in the particular core position. Equal check delay latch 68 is also reset at the beginning of R1 time and is set if there is a 1 output from the equal check delay sense amplifier.

And 69 turns on error latch 70 at WO time. This is as a result of the signal over line 59, if a hammer has fired and latch 67 is on, indicating that a hammer fired and no print compare occurred to erase the 1 originally in plane 60. Thus, operation of inhibit driver...