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Limited Resolution Facsimile System

IP.com Disclosure Number: IPCOM000096709D
Original Publication Date: 1963-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 53K

Publishing Venue

IBM

Related People

Gruodis, A: AUTHOR [+2]

Abstract

This limited resolution facsimile system has compatibility with alphanumeric data transmission systems. The system also is for supplementing real time data systems with pictorial information.

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Limited Resolution Facsimile System

This limited resolution facsimile system has compatibility with alphanumeric data transmission systems. The system also is for supplementing real time data systems with pictorial information.

The system has a scanner and light source 20 including photocell amplifier 30, analog to digital converter 40, and electric typewriter 50. The scanner and source 20 is an attachment for typewriter 50 of which platen 21 is shown. The attachment includes light source 22, rigid opaque tube 23 and photocell 24. A picture or other optical information 25 desired to be scanned is rolled on to platen
21. A lowspeed pulse generator, not shown, transmits pulses to the space bar of typewriter 50 which spaces platen 21 in a horizontal direction to permit photocell 24 to scan successive picture portions. When the right end edge of the picture is reached, the carriage is returned and platen 21 is indexed. The carriage is again spaced along a new horizontal line. In this fashion, the entire picture is scanned.

The variation in the amount of light reflected from the photograph onto photocell 24 is converted into a resistance change by it. Photocell 24 is in series with + V supply 31 and an input to photocell amplifier 30. The variation in resistance of 24 is converted into a varying current input to emitter follower amplifier 32. The amplifier 32 output is supplied through emitter followers 33 and 34 to converter 40. The output of 34 is a voltage swing roughly between a reference potential 35 and the + voltage supply 31, the high voltages corresponding to the white picture areas.

Converter 40 converts the input signal to one of nine possible output signals. The output signals are employed to operate specific keys in typewriter 50. Converter 40 comprises one or more corresponding stages. One stage has transistors T11, T12, T13 and T14 and associated resistors. Each stage of converter 40 responds with an up level to input voltages lying within predetermined limits.

Stage 1, e. g., provides an output signal for input voltages between the ranges of 0 to + 0. 5V. Stage 2 provides an output signal for input signals between the ranges of 0.5 to 1.0 volts. The voltage limits of each stage are the base voltages of transistors Tn3 and Tn4 where n is the stage number. These voltages are set by varying the values of resistors Rn3 and Rn4 and of Rn5 and Rn6, where again n is the stage number.

Stage 2 is employed to describe typical operation. With the base voltage of T24 set at 0.5 volts by adjusting the values of resistors R25 and R26 and the base voltage of T23 set at 1.5 volts by adjusting the values of R23 and R24, an input voltage of less than 0.5 volts permits T23 and T24 to conduct. The output of stage 2, taken at node 2 is a down voltage level since T24 is conducting. For input voltages greater than 1.5 volts, T21 and T22 are conducting sin...