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Dominate Set Reset Trigger

IP.com Disclosure Number: IPCOM000096802D
Original Publication Date: 1963-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Willette, EL: AUTHOR

Abstract

This trigger circuit can be set and reset upon the simultaneous occurrence of data and clock pulses. Additionally, it allows one of a pair of data inputs to dominate its action.

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Dominate Set Reset Trigger

This trigger circuit can be set and reset upon the simultaneous occurrence of data and clock pulses. Additionally, it allows one of a pair of data inputs to dominate its action.

Transistors T3, T4, T6 and T7 are normally conductive and transistor T5 is normally nonconductive. This is with no data or clock inputs. The conduction of T2 is controlled by the potential across resistor 10 which is in turn controlled by the conduction state of T1. Tunnel diode pair 12 is biased for an up voltage when T3, T4 and T5 are nonconductive and a down voltage when one or more of these is conductive. The potential appearing at common node 14 controls the conduction state of T1.

Between clock pulses, the state of diode pair 12 is latched either up or down by a feedback path which consists of conductor 16, T1, T2 and T4. T5 does not affect the state of pair 12 due to its nonconductive state. If the potential at node 14 is at the up voltage state, T1 is conductive and prevents T2 from conducting. The result is that all the current from resistor 18 must flow through pair 12 which latches the pair to its up state. Alternatively, with pair 12 in the down voltage state, T1 is nonconductive allowing T2 to conduct. The result is that a current path, which includes T4 and T2, provides sufficient diversion of current from node 14 to cause the low voltage state of pair 12 to be maintained.

Upon simultaneous occurrences of a clock pulse and an A data input negative...