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Analog To Digital Converter

IP.com Disclosure Number: IPCOM000096838D
Original Publication Date: 1963-Dec-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Wortzman, D: AUTHOR

Abstract

The circuit is an analog-to-digital converter. Its setting is not influenced by a high frequency, low amplitude noise signal.

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Analog To Digital Converter

The circuit is an analog-to-digital converter. Its setting is not influenced by a high frequency, low amplitude noise signal.

Compare register 1 samples the potential at summing junction 1 (SJ1) and generates an output signal if the potential at SJ1 is zero or minus. An output signal from register 1 is applied to energize switch S1. This ordinarily applies a ground potential to the circuit. When it is energized, it applies a potential Vr to the circuit. Register 2 operates in a similar manner with respect to SJ2 and S2. Register 3 operates in a similar manner with respect to SJ3 and S3. The registers are sampled in succession. thus, a decision is made as to whether s1 is to be energized before a decision is made with respect to S2. A decision is made as to whether S2 is to be energized before a decision is made with respect to S3. S1...S3 are used to represent a binary 4, 2, and 1, respectively.

Assume that Vr is +8 volts and that the input signal is -3.70 volts. SJ1 is therefore at a slightly positive potential, leaving S1 deenergized. S1, applying a ground potential through the 2R resistor to SJ2, leaves SJ2 at a slightly negative potential when register 2 is sampled. Therefore, S2 is energized. SJ3 is similarly at a slightly negative potential when register 3 is sampled. Thus, S3 is also energized. Because of the binary values assigned to the switches, the switches are now set to represent a 3.

Where a high frequency, low amplitude...