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High Speed Logic Circuit

IP.com Disclosure Number: IPCOM000096947D
Original Publication Date: 1962-Feb-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Rymaszewski, EJ: AUTHOR

Abstract

The high speed logic circuit employs a negative resistance device for inversion of signals. The circuit includes tunnel diode 10 having a negative resistance region between two positive resistance regions. Diode 10 is connected in series in like polarity with a grounded base transistor 11 between input and output terminals 17 and 18, respectively. Diode 10 and transistor 11 have a combined V-I characteristic with a negative resistance region in the forward conducting direction.

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High Speed Logic Circuit

The high speed logic circuit employs a negative resistance device for inversion of signals. The circuit includes tunnel diode 10 having a negative resistance region between two positive resistance regions. Diode 10 is connected in series in like polarity with a grounded base transistor 11 between input and output terminals 17 and 18, respectively. Diode 10 and transistor 11 have a combined V-I characteristic with a negative resistance region in the forward conducting direction.

The load line for this characteristic is determined primarily by resistor 22. It is switched dependent on the current input at terminal 17. If the input current at 17 is small (characteristic A), the output current at terminal 18 is large (IA). If the input current is large (characteristic B), the output current is small (IB). Thus, the circuit acts as an inverter.

The circuit performs logic operations in the nanosecond range.

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