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Pulse Generator

IP.com Disclosure Number: IPCOM000096955D
Original Publication Date: 1962-Feb-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Pengelly, PE: AUTHOR

Abstract

The circuit generates pulse trains having various mark-space ratios. It comprises a pair of transistors T1, T2 each connected in common emitter mode and having a series LC arrangement and a diode in its output circuit.

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Pulse Generator

The circuit generates pulse trains having various mark-space ratios. It comprises a pair of transistors T1, T2 each connected in common emitter mode and having a series LC arrangement and a diode in its output circuit.

When an input pulse is received at the base of T1, it is turned on. This produces a positive going pulse at the collector, which excites circuit L1C1. The latter is damped by R3 and the resistance of T1 in series. The voltage of the input of diode D1 rises sinusoidally at a frequency f = 1/2*Pi*sqrt(L1C1) as long as the damping due to R3 and T1 is small.

After a quarter cycle, the voltage reaches half its peak value, at which point D1 conducts. Some of the resonant circuit current is then diverted to supply the current demanded by R4 and turn off T2. As long as this diverted current is not too large to cause appreciable damping of the tuned circuit, T2 remains off for a further half cycle. This occurs until the voltage at point c begins to fall, cutting off D1 and allowing T2 to turn on again through R4. Thus, there is produced by T2 an output pulse delayed by t/2=Pi*sqrt(L1C1)/2 from the input pulse and with a pulse width t =Pi*sqrt(L1C1).

The T2 output circuit also includes circuit L2C2 and diode D2 which couples T2 to the T1 base. By adjusting the resonant frequency of both LC circuits, two independent series of pulse trains are developed across the T1 and T2 collector loads, spaced by a desired time interval. Typical component v...