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Binary Trigger

IP.com Disclosure Number: IPCOM000096998D
Original Publication Date: 1962-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Buelow, FK: AUTHOR

Abstract

The trigger consists of two Esaki diodes 1 and 2 in series aiding relation and with opposite operating conditions. There is a feedback circuit with a slight delay consisting of two transistors 3 and 4 in emitter follower connection. A tap of the emitter resistor of transistor 3 is connected with the junction of the two diodes and the base electrode of transistor 4. The junction between the collector and the collector resistor of transistor 4 is connected with the base electrode of transistor 3. One of these transistors is fully conducting the other slightly conducting.

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Binary Trigger

The trigger consists of two Esaki diodes 1 and 2 in series aiding relation and with opposite operating conditions. There is a feedback circuit with a slight delay consisting of two transistors 3 and 4 in emitter follower connection. A tap of the emitter resistor of transistor 3 is connected with the junction of the two diodes and the base electrode of transistor 4. The junction between the collector and the collector resistor of transistor 4 is connected with the base electrode of transistor 3. One of these transistors is fully conducting the other slightly conducting.

With the feedback circuit disconnected, diode 1 sees a load represented by curve A. With the feedback circuit connected and transistor 3 fully conducting, the load curve is B. With transistor 4 fully conducting, the load curve is C.

With the system in a condition represented by P, a positive pulse fed to input 5 shifts the system to the condition represented by Q. A second pulse shifts it back to P.

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