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Browse Prior Art Database

Input Output Processing

IP.com Disclosure Number: IPCOM000097033D
Original Publication Date: 1962-Apr-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 50K

Publishing Venue

IBM

Related People

Tate, RD: AUTHOR [+3]

Abstract

The arrangement is memory-centered. Processing speed is developed by the time sharing of a very few high speed computer circuits which service the memory. Memory 1 communicates via memory data register MDR and a bus network with other computer elements. Data processing takes place by manipulating data between memory 1 and various high speed storage registers and arithmetic units having access to the busses. Program control maintains order in the data manipulation.

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Input Output Processing

The arrangement is memory-centered. Processing speed is developed by the time sharing of a very few high speed computer circuits which service the memory. Memory 1 communicates via memory data register MDR and a bus network with other computer elements. Data processing takes place by manipulating data between memory 1 and various high speed storage registers and arithmetic units having access to the busses. Program control maintains order in the data manipulation.

Input output operations provide the computer with data for manipulation and carry away computation results. I-O devices are magnetic tapes, disks or other large storage units which connect to the computer via interface 3. Where several I-O devices are used, priority mechanism 4 prevents interference between them. Incoming and outgoing data passes between the I-O device and memory 1 via interface 3, priority 4 and MDR. Memory address register MAR specifies the memory locations involved.

For high performance, I-O processing should occur simultaneously with arithmetic processing. Memory 1, MDR and MAR are time shared between I-O processing and internal computation. Computations are interrupted in order to service the I-O demands. In the arrangement, a stored program controls data manipulations. The normal program operation is defined as computation. Computation program control is stepped through itself by manipulating data from memory 1 according to addresses placed in MAR. This references memory locations to MDR and provides computation area 6 with access to memory 1.

I-O processing requires priority over computation and is provided with interrupt capability. At each computation stage, a program control word is available in register 7. This word includes all information necessary to resume processing of the current program should it be interrupted. The computation program continues at top speed until an I-O request passes interface 3 and priority 4. The request from the I-O device may be to present a data byte for storage in memory 1. Counter 8, which is incremented by incrementer 9, is at a count appropriate to address the next open byte of the buffer. The I-O request initiates a program sequence controlled by byte assembly control 10.

Memory 1 contains four word positions ABCD which are referenced according to fixed addresses available at fixed address 11. Control 10 interrupts the computation program long enough to store the byte and then pa...