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Frequency Deviation Indicator

IP.com Disclosure Number: IPCOM000097038D
Original Publication Date: 1962-Apr-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Seith, LK: AUTHOR

Abstract

Attainment of a desired frequency and deviations from such frequency are indicated by this circuit.

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Frequency Deviation Indicator

Attainment of a desired frequency and deviations from such frequency are indicated by this circuit.

Input pulses 1 are applied to trigger 20 which develops complementary outputs. Pulses 1 are generated from regularly spaced indicia on a device, the speed of which dictates the period between pulses. Outputs 2 and bar 2 of 20 are applied to single-shots (SS's) 3 and 4, respectively. SS's 3 and 4 have an unstable period equal to the period between pulses 1, when the device is at the desired speed.

When the unstable states of 3 and 5 overlap at AND 5, trigger 6 is set to indicate the desired speed has been reached (at T(1) of waveforms).

When the desired speed is reached, the remainder of the circuit provides indications the device has deviated from that speed. AND 7 and the inverted output of holdover SS 8 indicate when the speed of the device falls below the desired speed. The unstable period of 8 is set to be slightly longer than the period between cycles of output 2 of trigger 20. SS 8 returns to its stable state, if the speed of the device slows enough such that the period between cycles of 20 exceeds the unstable period of 8 (at T(2) of waveforms).

If the device increases its speed over that desired, the outputs 2 and bar 2 of trigger 20 cause the unstable states of SS's 9 and 10 to overlap at AND 11. The unstable period of SS's 9 and 10 is slightly less than the desired period between pulses 1 (at T(3) of waveforms).

Trigger 6 ind...