Browse Prior Art Database

Computer Clock Synchronization

IP.com Disclosure Number: IPCOM000097091D
Original Publication Date: 1962-May-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Boden, RC: AUTHOR

Abstract

In computer systems operating on the same program and data synchronization is necessary of the separate clocks of each computer when the computers are in a duplex operation mode. The circuit permits operating in either a synchronous or non-synchronous mode. If the computers operate in non-synchronous mode, And's 17 and 18 condition gates 13 and 14. This permits Oscillator A and B pulses on lines 15 and 16 to step their respective clocks through the Non-Synchronous gates 13 and 14 and associated Or's 19 and 20. When a synchronous mode of operation is selected, synchronous gates 21 and 22 are conditioned via Or 23. The latter is controlled by the Sync-Op and In-Sync inputs. Select Switch 25, when in Automatic position, permits both Osc A and B pulses to pass through the conditioned manual Select A and B gates 11 and 12.

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Computer Clock Synchronization

In computer systems operating on the same program and data synchronization is necessary of the separate clocks of each computer when the computers are in a duplex operation mode. The circuit permits operating in either a synchronous or non-synchronous mode. If the computers operate in non-synchronous mode, And's 17 and 18 condition gates 13 and 14. This permits Oscillator A and B pulses on lines 15 and 16 to step their respective clocks through the Non-Synchronous gates 13 and 14 and associated Or's 19 and 20. When a synchronous mode of operation is selected, synchronous gates 21 and 22 are conditioned via Or 23. The latter is controlled by the Sync-Op and In-Sync inputs. Select Switch 25, when in Automatic position, permits both Osc A and B pulses to pass through the conditioned manual Select A and B gates 11 and 12. When 25 is in position A or B, only the associated manual A gate 11 or B gate 12 is conditioned, permitting only Osc A or B to step both clocks without the automatic switch provision.

With switch 25 in normal Automatic position, Osc A and B pulses pass their respective manual gates 11 and 12 and Synchronous gates 21 and 22 and Strobe the Automatic Select and Request Select A gates 27 and 28 and Auto Select and Request Select B gates 29 and 30, respectively. Only one of manual select and automatic select gates is conditioned by the Automatic Select flip-flop 31 and the Request Select flip-flop 32. Assume Auto-gate 27 is...