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Double Precision Arithmetic

IP.com Disclosure Number: IPCOM000097160D
Original Publication Date: 1962-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Allen, E: AUTHOR [+4]

Abstract

The size of numbers to be operated upon by a parallel binary computer is doubled. A parallel binary computer uses four basic units: an accumulator register (AC), a multiplier quotient register (MQ), a storage register (SR) and an adder to perform the arithmetic operations of addition, subtraction, multiplication and division. If number-representing data words to be operated upon are 35 bits long, each one of the units has 35 positions. By using two additional 35 position registers, the sense indicator register (SI), and the instruction backup register (IBR), during arithmetic operations, the data word size is increased to 70 bits.

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Double Precision Arithmetic

The size of numbers to be operated upon by a parallel binary computer is doubled. A parallel binary computer uses four basic units: an accumulator register (AC), a multiplier quotient register (MQ), a storage register (SR) and an adder to perform the arithmetic operations of addition, subtraction, multiplication and division. If number-representing data words to be operated upon are 35 bits long, each one of the units has 35 positions. By using two additional 35 position registers, the sense indicator register (SI), and the instruction backup register (IBR), during arithmetic operations, the data word size is increased to 70 bits.

In floating point operations, 27 bits of each data word express a number (fraction). The remaining eight bits (exponent) represent the position of a radix point in the fraction. Two 70-bit double precision floating point data words are stored in four 35-bit storage locations as shown. The first data word fraction is split into two sections A and B, and the second data word fraction is split into two sections C and D. The exponent N of the first data word is stored in association with the first section A. The second section B of the first data word fraction is displaced from the first section A, since it is a continuation of the first section. This is by specifying that its exponent is 27 less (N-27) than the exponent N of section A.

Similarly, the exponent of the second data word is M, the position of the second section D of the fraction being fixed...