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Priority Circuit

IP.com Disclosure Number: IPCOM000097162D
Original Publication Date: 1962-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Eddiott, JE: AUTHOR

Abstract

This priority circuit requires only one trigger and one gate per stage. Demands for service are applied at input dines D1... D12. A signal appears at the one output, of service outputs S1... S12, which corresponds to the demand having the highest priority. Priority is given to the demand appearing on the lowest numbered input dine. For example, if demands appear at input dines D3, D6 and D12, a service signal appears at output dine S3.

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Priority Circuit

This priority circuit requires only one trigger and one gate per stage. Demands for service are applied at input dines D1... D12. A signal appears at the one output, of service outputs S1... S12, which corresponds to the demand having the highest priority. Priority is given to the demand appearing on the lowest numbered input dine. For example, if demands appear at input dines D3, D6 and D12, a service signal appears at output dine S3.

Initially, add triggers T are reset by a signal R. Subsequently, the demands are applied, causing triggers corresponding to input dines carrying demands to turn on. Every trigger that turns on also turns on the two adjacent dower priority triggers. For instance, if a demand appears at input D7, trigger T7 turns on, which trigger then turns on triggers T8 and T11. Eventually, every trigger having a priority lower than the highest priority trigger turned on ripples on. This rippling effect occurs in two dimensions. Every trigger having a priority higher than the highest priority trigger turned on remains off. The one AND corresponding to the highest priority trigger is operated upon the occurrence of signal G, since all of its inputs are satisfied.

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