Browse Prior Art Database

High-Tolerance Cryotron Memory

IP.com Disclosure Number: IPCOM000097218D
Original Publication Date: 1962-Jul-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

Rosenberger, GB: AUTHOR

Abstract

The binary storage device employs superconductive elements. Cryogenic gate 1 and sense cryotron 2 are deposited onto a substrate. Current I' flows through cryotron 1, when the latter is superconducting. Current I'' flows through cryotron 2, when the latter is superconducting. When cryotron 1 becomes resistive, an alternate path for current I' is through path 3. This alternate path bypasses cryotron 1 but applies a bias to cryotron 2. Two drive lines 4 and 5 are provided for cryotron 1. Current I''' and current I'''', passing through their respective drive lines 4 and 5, supply sufficient flux to drive cryotron 1 resistive.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 87% of the total text.

Page 1 of 2

High-Tolerance Cryotron Memory

The binary storage device employs superconductive elements. Cryogenic gate 1 and sense cryotron 2 are deposited onto a substrate. Current I' flows through cryotron 1, when the latter is superconducting. Current I'' flows through cryotron 2, when the latter is superconducting. When cryotron 1 becomes resistive, an alternate path for current I' is through path 3. This alternate path bypasses cryotron 1 but applies a bias to cryotron 2. Two drive lines 4 and 5 are provided for cryotron 1. Current I''' and current I'''', passing through their respective drive lines 4 and 5, supply sufficient flux to drive cryotron 1 resistive.

I' flowing through gate 1 represents the storage of 0. I' flowing through path 3 represents the storage of 1. To store a 1, coincident currents I''' and I'''' are applied to drive lines 4 and 5 affecting cryotron 1. The combined fields due to such coincident currents drive gate 1 resistive and divert I' to path 3. Upon termination of drive currents I''' and I'''', a persistent current exists in the loop ABCDA. When readout of the memory device is desired, currents I''' and I'''' are applied simultaneously, but the direction of current I'''' is reversed. This reversal of current in only one drive line permits cryotron 1 to remain superconductive during readout. Currents are induced in the closed loop ABCDA that are additive to the persistent current flowing in such closed loop. Cryotron 2 is driven resistive and th...