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Multilayered Thin Films

IP.com Disclosure Number: IPCOM000097311D
Original Publication Date: 1962-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Lessor, AE: AUTHOR [+2]

Abstract

This is a process for producing thin film electronic circuit networks in which interconnecting patterns are produced over vacuum deposited resistor elements.

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Multilayered Thin Films

This is a process for producing thin film electronic circuit networks in which interconnecting patterns are produced over vacuum deposited resistor elements.

On a substrate of glass 1, an initial layer of silicon monoxide 2 is vacuum deposited. A plurality of resistive elements 3 are deposited through a mask pattern upon the SiO. Each resistive element is obtained by vacuum depositing simultaneously chromium and SiO so that a molecular mixture of the two materials forms the resistor. Electrically conducting lands 4 are vacuum deposited, through a mask, to connect to such resistive elements 3. A second layer of silicon monoxide 5 is deposited through a mask to cover all the resistive elements 3 on the substrate and a portion of each of the lands 4. Portions of the latter are left exposed for connection with other lands.

An underflash layer of chromium 6 and a copper covering 7 are deposited over the entire substrate surface, including the silicon monoxide 5 as well as the lands 4. The entire surface is then covered with a layer 8 of photoresistive material and, through a mask, only those areas of photoresist covering the desired conductive paths are exposed to light. Such light fixes the photoresist so that the latter is not affected by subsequent bathing steps, namely, a solution of ferric chloride or HCl to remove the non exposed photoresist 8 and the copper 6 under it. The underlying chromium 6 is depassivated with a piece of zinc so tha...