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Sense Amplifier For Magnetostrictive Delay Lines

IP.com Disclosure Number: IPCOM000097336D
Original Publication Date: 1962-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Widmer, A: AUTHOR

Abstract

This amplifier is for sensing the output of a magnetostrictive delay line. It provides amplification, reshaping and retiming of the output pulse under the control of an external two-phase clock.

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Sense Amplifier For Magnetostrictive Delay Lines

This amplifier is for sensing the output of a magnetostrictive delay line. It provides amplification, reshaping and retiming of the output pulse under the control of an external two-phase clock.

A two-stage, directly coupled transistor amplifier 1 effects initial amplification of any output from the delay line memory. When the associated clock pulses are positive, the associated tunnel diodes T1 or T2 are deconditioned, i.e., biased at point 1. When the associated clock pulses are negative, tunnel diodes T1 and T2 are conditioned, i.e., biased in their active region indicated by point 2. If a delay line output pulse is received from amplifier 1 when T1 is conditioned, T1 switches to its high voltage state indicated as point 3. It remains in this state until clock A goes positive again.

Just before T1 is returned to its low voltage state by clock A going positive, clock B goes negative, biasing tunnel diode T2 at point 2. Diode T2 immediately switches to point 3 due to the extra effect of T1's high voltage state. It remains in its high voltage state for the duration of clock pulse B. Thus, diode T1 senses and stores the input pulses as long as clock pulse A is in the down level, and diode T2 is brought into the sensitive state by clock pulse B just before T1 is reset. T2 reads out T1 and delivers to the output a completely reshaped pulse in phase with clock B. The output stage comprising transistor Q provides transl...