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Logarithmic Digital To Analog Converter

IP.com Disclosure Number: IPCOM000097343D
Original Publication Date: 1962-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Harrison, TJ: AUTHOR

Abstract

Where input data to a display or computer is variable over an exceedingly wide range, the data is converted to a logarithm. This device converts an n bit binary number to an analog voltage representing an approximation of the logarithm to the base two of the number. It can be used as a component of a logarithmic analog to digital converter or as a means for deriving a logarithmic input voltage to a display.

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Logarithmic Digital To Analog Converter

Where input data to a display or computer is variable over an exceedingly wide range, the data is converted to a logarithm. This device converts an n bit binary number to an analog voltage representing an approximation of the logarithm to the base two of the number. It can be used as a component of a logarithmic analog to digital converter or as a means for deriving a logarithmic input voltage to a display.

The binary number is fed through input gating 1 into an n bit binary register 2. Shift pulses on line 3, derived from And 4, are applied to register 2 and counter 5. And 4 continues to pass clock pulses on line 6 until a bit appears in the high order position of register 2. The status of line 7 then changes to block the passage of clock pulses.

Counter 5 is preset to the value n and counts down one unit each time a shift pulse is applied to register 2. Thus, the number of shifts is subtracted from n to leave a number representing the order of the most significant bit. This number is equal to the characteristic of the logarithm which represents the number in register 2. The value in counter 5 is applied over line 8 to an n level digital to analog converter 9 such as a ladder network. The output of converter 9 appears on line 10 as a voltage having one of n possible levels.

The mantissa is determined to the desired accuracy by decoding a sufficient number of lower order positions by means of decoder 11. Lines 12 connect de...