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Transistor Long Time Delay Circuit

IP.com Disclosure Number: IPCOM000097366D
Original Publication Date: 1962-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Smith, PF: AUTHOR

Abstract

Accurate, relatively long time delay circuits utilizing only solid state components are difficult to achieve, due to inconsistencies in characteristics from transistor to transistor and the sensitiveness of transistors to temperature variations.

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Transistor Long Time Delay Circuit

Accurate, relatively long time delay circuits utilizing only solid state components are difficult to achieve, due to inconsistencies in characteristics from transistor to transistor and the sensitiveness of transistors to temperature variations.

This time delay circuit eliminates ambiguities in timing and requires a rapidly changing, low impedance, negative going pulse as the input signal. Condenser 1 is charged through diode 3 and resistor 2 to whatever voltage the input swings through. Condenser 1 discharges through resistor 4 and the base-emitter junction of NPN transistor 5. The discharge current is sufficient to saturate 5 during substantially the entire discharge time. Since the current wave form at the base-emitter diode of 5 is substantially exponential, starting at a relatively high value and approaching zero with time, the collector of 5 is bottomed most of the time near ground. This is because resistor 7 is several times larger than resistor
4. At some time, however, when the base current becomes small enough, transistor 5 comes off bottom. In this manner, there is an inverted and greatly amplified tail of exponential current through the base-emitter diode of 5 as shown.

Assuming that a 200 millisecond delay is desired, the middle drawing shows that the trigger point is located on the steep portion of the phantom exponential curve. If the phantom exponential curve is not provided, the trigger point falls on the flat p...