Browse Prior Art Database

Error Detecting System

IP.com Disclosure Number: IPCOM000097409D
Original Publication Date: 1962-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

McGowan, MP: AUTHOR

Abstract

The system detects errors in binary coded numbers and arithmetical operations. It is based on the principle of casting out one less than the radix of the number system employed. In an octal system, which is used for purposes of illustration, the cast-out value is seven.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 2

Error Detecting System

The system detects errors in binary coded numbers and arithmetical operations. It is based on the principle of casting out one less than the radix of the number system employed. In an octal system, which is used for purposes of illustration, the cast-out value is seven.

It is assumed that the octal numbers 143 and 545 are to be added. These numbers each have an indicator associated with them, which is the sevens complement of the remainder after sevens have been castout. The remainder after cast-out for the number 143 is 1 so that the indicator is 6. Similarly, the indicator for the number 545 is 7. The indicator 6 for the sum 710 of these two octal numbers is equal to the sum of the two indicators after sevens have been cast out.

In the adding operation, the two numbers with their indicators are initially stored in coded binary form in separate registers 10 and 11. The stored information is then supplied in bit-by-bit or serial fashion to full binary adder 12, indicators first followed by the lower order binary groups. Each of the summed bits is transferred to output register 13 and to full binary check adder 14. The latter is connected in a closed loop with check register 15 having three stages 16, 17 and 18. The data in register 15 is shifted one position each cycle of operation of adder 14.

As shown in the example, the indicators are first added so that 101 appears in registers 13 and 15 at the end of three add cycles. The main adder indicates a carry is present. Three dummy add cycles A, B and C are required to add...