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Method for Generating Masking Functions

IP.com Disclosure Number: IPCOM000097484D
Original Publication Date: 1962-Dec-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Burns, WE: AUTHOR [+3]

Abstract

Devices are provided for generating masking functions in a stored program processor. Data contained in one register can be operated on, or modified, or function as control modifiers as a result of bits contained in another register which function as a primary control medium.

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Method for Generating Masking Functions

Devices are provided for generating masking functions in a stored program processor. Data contained in one register can be operated on, or modified, or function as control modifiers as a result of bits contained in another register which function as a primary control medium.

Various bit combinations established in the D register 8 can be used to move any part of a character or characters from the A address to the B address. During successive machine cycles, suitable signals are generated. These cause the instruction to alternate storage references to the A and B address and to modify the addresses in discrete steps so as to cause all characters within the set stipulated by the instruction to be operated on in the manner described. In the masked move operation, a character in memory 2 at an A address is read out on the first cycle into R register 4 from which bits also present at register 8 are transferred to W register 6. On the following machine cycle, register 4 is reset, register 8 is binary complemented. A character in memory at a B address is read into register 4 from which bits now present at register 8 are transferred to register 6 which bits, in turn, are written at the B address.

The possible cases are as follows:

1. If a bit is present in the D register and a bit is read from the A address in the first machine cycle, it is written into the B address on the second machine cycle.

2. If a bit is present in the D regi...