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Balanced Differential Amplifier

IP.com Disclosure Number: IPCOM000097523D
Original Publication Date: 1961-Jan-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Petrone, DJ: AUTHOR

Abstract

The circuit is a balanced differential amplifier for obtaining an improved common mode rejection ratio. The differential amplifier comprises two NPN transistors T1 and T2 having a common emitter connection through a resistor R6 to a negative voltage supply -V. Load resistors R4 and R5 connect to the collectors of the transistors and join at common junction EC. EC connects through resistor R1 to the positive terminal of supply V. Resistors R2 and R3 supply negative feedback between EC and the bases of T1 and T2. R1 acts as a summing resistor for the current flowing in both loads R4 and R5.

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Balanced Differential Amplifier

The circuit is a balanced differential amplifier for obtaining an improved common mode rejection ratio. The differential amplifier comprises two NPN transistors T1 and T2 having a common emitter connection through a resistor R6 to a negative voltage supply -V. Load resistors R4 and R5 connect to the collectors of the transistors and join at common junction EC. EC connects through resistor R1 to the positive terminal of supply V. Resistors R2 and R3 supply negative feedback between EC and the bases of T1 and T2. R1 acts as a summing resistor for the current flowing in both loads R4 and R5.

If E1 and E2 are equal and out of phase, the voltage change at EC is zero. If E1 and E2 are equal and in phase, the EC has some amplitude depending upon the natural balance of the amplifier and size of R6. This amplitude is fed back to the two bases of T1 and T2 out of phase, minimizing the common mode component. The signal gain is not affected since the signal voltage at EC is zero and no feedback results. Common mode gain is decreased and signal gain is unaffected.

Outputs of the amplifier are taken from the collectors at terminals O1 and O2.

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