Browse Prior Art Database

Octal Counter

IP.com Disclosure Number: IPCOM000097618D
Original Publication Date: 1961-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Hinkein, DJ: AUTHOR [+2]

Abstract

This binary counter is divided into octal groups of stages for reducing the resolution time due to ripple carries between stages. The counter employs pulse circuitry and utilizes registers made up of SSD storage devices which are sampled destructively. The SSB and SSA storage devices are sampled non-destructively.

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Octal Counter

This binary counter is divided into octal groups of stages for reducing the resolution time due to ripple carries between stages. The counter employs pulse circuitry and utilizes registers made up of SSD storage devices which are sampled destructively. The SSB and SSA storage devices are sampled non- destructively.

A pulse on either of lines 7 or 8 reads out the significant content of SSD 1-0 as a pulse on line 9. At the same time it clears the device. On the other hand, a pulse on line 10 sets the device. In contrast, SSB 4-0 is sampled non- destructively by a pulse on line 11, set by a pulse on line 12, and cleared by a pulse on line 13. SSA devices are set by pulse inputs on lines 14, cleared by pulse inputs on lines 14, and read non-destructively to yield a pulse output when sampled by a pulse on line 16. The decoders 17, 18 are pulse input-pulse outputs without storage, but gate 19 stores pulses received on lines 20 until triggered destructively by a pulse on line 21.

In the counter, each binary stage has a pair of storage devices. The lowest order stage comprises SSD 1-0 and SSD 1-1. The second lowest order comprises SSD 2-0 and SSD 2-1, etc. To clear a given binary stage X, the corresponding X-0 device is set and the X-I device is cleared.

In the low order octal group 1-0 through 3-1, a Step Counter pulse samples the contents of the three stages simultaneously, clearing the stages to their zero state. The outputs of this sampling operation are introduced into decoder 17 which g...