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Pulse Width Modulator Multiplexor

IP.com Disclosure Number: IPCOM000097633D
Original Publication Date: 1961-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Rumble, DH: AUTHOR

Abstract

A large number of data channels 1... N are accommodated and excellent linearity of signal is realized in the microwave transmission circuit. It is based on dual reactance switching and pulse width modulation techniques.

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Pulse Width Modulator Multiplexor

A large number of data channels 1... N are accommodated and excellent linearity of signal is realized in the microwave transmission circuit. It is based on dual reactance switching and pulse width modulation techniques.

The circuitry is for channel 1 and similar circuitry is provided for channels 2...
N. Seven bit characters are entered parallel by bit on the lines C... 1 into shift register 1. The individual bits of a character are shifted onto the line 2 as register 1 is stepped by shift pulses from a control unit 3. A 1 bit conditions AND 4 directly, while a 0 bit conditions AND 5 after inversion. Sample pulses are applied to 4 and 5 on line 6, subsequent to shifting. A 1 bit through 4 switches a diode 7 to make capacitor 8 effective in the tuning circuit of oscillator 9. A 0 bit through 5 switches diode 10 so that an inductance 11 is effective in the tuning circuit.

The oscillator 9, should have high stability and a high L to C ratio. The initial frequency of 9 is established at a value W. The frequencies of the oscillators for the other channels 2...N are spaced apart sufficiently to avoid overlapping conditions or crosstalk between channels. The output of 9 at the junction 12 is a sine wave signal which moves alternately in positive and negative directions about a reference level. An AND 13 responds to the positive portions of the signal and to a delayed sample pulse on line 14. A 1 bit through capacitor 8 lowers the frequency of 9. T...