Browse Prior Art Database

Batteryless Voltage Comparitor

IP.com Disclosure Number: IPCOM000097660D
Original Publication Date: 1961-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Dym, H: AUTHOR

Abstract

The voltage comparitor circuit at the left provides an output pulse when the ramp input equals the analog input. This is accomplished by adjusting the current so that the Esaki diode is biased at its current peak. As the ramp passes the analog voltage, it causes the Esaki diode to switch states.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Batteryless Voltage Comparitor

The voltage comparitor circuit at the left provides an output pulse when the ramp input equals the analog input. This is accomplished by adjusting the current so that the Esaki diode is biased at its current peak. As the ramp passes the analog voltage, it causes the Esaki diode to switch states.

The bias current in this circuit is obtained by making use of the ramp voltage, eliminating the need for a battery. As the capacitor C1 is charged by the ramp voltage it has a D. C. current through it. This D. C. current, during the rise of the ramp, is used to bias the Esaki diode. The capacitor C2 is very large compared to C1 and acts essentially as a short circuit to the ramp. Its purpose is to divert the bias current so it does not flow through the analog source.

The figure on the right shows the bias current and the voltage change (V2- V1) which is detected at the output.

The voltage comparitor can use low current Esaki diodes, on the order of 10 microampere peaks, in which case the capacitor C2 can be removed.

1

Page 2 of 2

2

[This page contains 2 pictures or other non-text objects]