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Regenerative Semiconductor Delay Device

IP.com Disclosure Number: IPCOM000097684D
Original Publication Date: 1961-Apr-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Chiang, FC: AUTHOR

Abstract

A series of PNPN transistors is formed when individual PN transistors are applied to a common PN base. To cause the series to turn on sequentially, this device utilizes the charging effect of the combined resistance and capacitance of a semiconductor material.

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Regenerative Semiconductor Delay Device

A series of PNPN transistors is formed when individual PN transistors are applied to a common PN base. To cause the series to turn on sequentially, this device utilizes the charging effect of the combined resistance and capacitance of a semiconductor material.

A positive input pulse is applied on input conductor 12 to cause the first PNPN element to turn on. Turning on of this element regenerates the wave-front of the input pulse and causes it to be propagated toward the next junction. The delayed pulses appear at the corresponding output terminals 13, 14, 15, etc. The rate of flow of the input pulse is determined by the resistance R per cm. of the P(1) layer and the capacitance C per cm. of the P(1)N(1) junction. If delta x is the spacing between adjacent PNPN transistors, the incremental time delay of the pulse between adjacent PNPN transistors is of the order of RC(delta
x)/2/seconds.

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