Browse Prior Art Database

Esaki Diode Memory

IP.com Disclosure Number: IPCOM000097690D
Original Publication Date: 1961-Apr-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Wolff, HP: AUTHOR

Abstract

The Esaki diode memory cell is adapted for destructive or non-destructive readout.

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Esaki Diode Memory

The Esaki diode memory cell is adapted for destructive or non-destructive readout.

Esaki diode 10 with anode 12 and cathode 14 is the storage element. Anode 12 is connected through coupling resistors 16 and 18 to X and Y lines on a matrix array. Cathode 14 is connected to sense line 20 for destructive sensing. Inclusion of a separate bias supply through resistor 15 is optional.

For non-destructive readout sensing, a network including resistors 22 and 24 is coupled between anode 12 and read bus 25. Diode 26 is connected between junction C, common to the resistors 22 and 24, and a sense line 28 including a sense amplifier 29. Diode 26 is either a conventional diode or a backward diode. Backward diode 26 is normally reversely biased to a threshold which is slightly more than the voltage drop appearing across 22 and 10 when the latter is not in a high voltage, low current 1 state.

A 1 or 0 is stored in 10 by coincidently applying positive or negative half- select pulses respectively on the X and Y lines of the storage cell.

Destructive sensing of the cell is accomplished by coincidently applying negative half-select pulses to the X and Y lines and sensing on the line 20.

Non-destructive readout of a cell is accomplished by applying a pulse to the read bus which, combined with the voltage across 10, determines the potential at point C. The polarity and magnitude of the read pulse is insufficient to drive 10 to the 1 state from the 0 state.

When 10 i...