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Digital Comparison

IP.com Disclosure Number: IPCOM000097848D
Original Publication Date: 1961-Aug-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Related People

Locke, PE: AUTHOR

Abstract

This circuit effects digital comparison of a binary signal with known high and low binary set limits. It includes a chain of digit comparators 10, 12, 14 and 16 which provide comparison for numerical binary signals representing 1, 2, 4 and 8 digits, respectively. Digit comparator 10 includes normally open relay contacts K1 and K5 with associated resistors R connected to ground. The relay coils taken together with the resistors form a bridge network. The digit comparators are connected to the binary signal input lines 18, binary low limit lines 20 and binary high limit lines 22.

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Digital Comparison

This circuit effects digital comparison of a binary signal with known high and low binary set limits. It includes a chain of digit comparators 10, 12, 14 and 16 which provide comparison for numerical binary signals representing 1, 2, 4 and 8 digits, respectively. Digit comparator 10 includes normally open relay contacts K1 and K5 with associated resistors R connected to ground. The relay coils taken together with the resistors form a bridge network. The digit comparators are connected to the binary signal input lines 18, binary low limit lines 20 and binary high limit lines 22.

Limit relays KH (high limit) and KL (low limit) provide binary signal indication of a go no go type. Relay KH is energized when the binary signal on lines 18 is less than or equal to the preset high limit on lines 22. Relay KL is energized when the binary signal on lines 18 is equal to or more than the preset low limit on lines 20.

With the operating potential +24 volts D.C. for relay circuits KH and KL, the binary signal and low limit and high limit are established by a +24 volts D.C. applied to the appropriate input lines. For example, a high limit of binary 4 is established by applying +24 volts D.C. to high limit line 24 and a low limit of binary 2 is established by applying +24 volts D. C. to low limit line 26. If the unknown binary signal be a binary 6, it is applied to lines 18 in a fashion which establishes +24 volts D.C. on signal input lines 28 and 30. Under th...