Browse Prior Art Database

Double Register

IP.com Disclosure Number: IPCOM000097862D
Original Publication Date: 1961-Aug-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Heilweil, MF: AUTHOR

Abstract

The register (upper drawing) permits new information to be entered into it at the same time that old information is being read out.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 86% of the total text.

Page 1 of 2

Double Register

The register (upper drawing) permits new information to be entered into it at the same time that old information is being read out.

The circuit contains two latches, input latch 10 and output latch 12. When the control signal is down, the AND's to latch 10 are closed and 10 stores a bit of information. At this time, the OR's to latch 12 are open. Latch 12 is forced to take on the opposite value stored in 10. To enter new information into the register, the control signal is raised. The gates to 10 are opened and 10 is set to the opposite value of the input signal. When the control signal comes up, the OR's to 12 are closed and 12 retains its previous state. As a result, the register output retains its original value even though the register has received the new input value. This is necessary in a D. C. shift register because the original value is being used to set another register.

When all information is latched, the control signal is brought down. This closes the gates to latch 10 which prevents an input change from affecting the value stored in the register. At the same time, the gates to latch 12 are opened forcing 12 to take on the opposite value of the new, value in 10. As a result, the register output changes to its new value after the control signal goes down, at which time it is too late to improperly affect other registers.

A D. C. binary trigger (lower drawing) is directly obtained by connecting the output of the register back to the inp...