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Unijunction Transistor Latch

IP.com Disclosure Number: IPCOM000097908D
Original Publication Date: 1961-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Trampel, KM: AUTHOR

Abstract

The reed, resistor logic circuit, capable of performing a latching function, in circuit A employs a unijunction transistor to obtain the stable states. The V-I diagram shows the unijunction transistor T has two positive resistance regions bounding a negative resistance region. The characteristic curve Vbbl is determined by resistor R4 connected between the B2 electrode and supply V2. Stable operating points A and B, designated off and on respectively, are obtained.

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Unijunction Transistor Latch

The reed, resistor logic circuit, capable of performing a latching function, in circuit A employs a unijunction transistor to obtain the stable states. The V-I diagram shows the unijunction transistor T has two positive resistance regions bounding a negative resistance region. The characteristic curve Vbbl is determined by resistor R4 connected between the B2 electrode and supply V2. Stable operating points A and B, designated off and on respectively, are obtained.

If T is off, current flow through coil C1 is small and the reed switch R1 is open. To activate the latch, a positive pulse is applied to the set input. Since its gate R3 is at potential V1, the load line is raised, causing emitter current to flow and T switches on. C1 has an impedance which limits the current flow to I1 when T is on. This current is sufficient to close R1, producing an output signal at ground potential. Resistor R3 deconditions the set input, and the reset input is conditioned by the resistor R2. If a negative going transition is applied to the reset input, the load line is pulled below the voltage level Vv, and the latch is switched off. Resistor R3 conditions the set input and R2 deconditions the reset input, so that no emitter current flows and R1 opens, causing the output potential to be at V1.

The complementary output is also obtained from the latch by adding an additional reed switch in inverted parallel relationship with reed switch R1. Since the reed switches have a very low impedance, and the associated resistors, for example R5, can also have a low impedance, the circuit provides a high driving output capability. Similarly, the circuit also operates as a la...