Browse Prior Art Database

Core Memory Sense Amplifier

IP.com Disclosure Number: IPCOM000097914D
Original Publication Date: 1961-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Leightner, RA: AUTHOR

Abstract

The circuit amplifies sense pulses from a core memory in a manner to block half-select noise signals from the output.

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Core Memory Sense Amplifier

The circuit amplifies sense pulses from a core memory in a manner to block half-select noise signals from the output.

The sense pulses on core sense line 10, passing through magnetic cores 11, are applied to the emitter of transistor 12. Transistor 12 is grounded base connected and serves as an impedance transformer. The signals from 12 pass to the base of transistor 13. Transistor 13 is grounded emitter connected and provides power gain for the sense pulses. A pulse steering network, comprising diodes 14 and 15, couples the signals from 13 to four-layer transistor 16. Positive pulses are applied to the base, while negative pulses are applied to the emitter of
16. A positive pulse supplied to the base, or a negative pulse supplied to the emitter of 16 turns it on, provided the pulse amplitude and width are above minimum values. When 16 is turned on, a change in the signal on output 17 is evidenced. Transistor 16 remains conductive until the collector current falls below a minimum value. This is determined by the time constant defined by resistors 18 and 19, capacitor 20 and the output capacitance of 16.

By proper selection of amplifier parameters, the amplitude and width response threshold of 16 is maintained above the half-select noise signals. These noise signals do not appear on output 17.

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