Browse Prior Art Database

Memory

IP.com Disclosure Number: IPCOM000097959D
Original Publication Date: 1961-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Conley, JW: AUTHOR

Abstract

The matrix employs an orthogonal array of Esaki diodes 6, each being associated with a load resistor 7. The latter is of such value as to provide a combination having a bistable characteristic exhibiting two stable operating points 0 and 1.

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Memory

The matrix employs an orthogonal array of Esaki diodes 6, each being associated with a load resistor 7. The latter is of such value as to provide a combination having a bistable characteristic exhibiting two stable operating points 0 and 1.

Such permits switching from one state to the other by voltage pulsing. If a diode is initially in the 0 state, it is switched to the 1 state by applying a voltage of amplitude which exceeds the knee in the forward characteristic portion. The diode almost instantly switches to its 1 state. Conversely, readout is accomplished by applying a voltage pulse of the opposite polarity. Its magnitude exceeds the knee of the characteristic in the negative direction. This almost instantly switches the diode back to its 0 state.

A memory based on the diode-resistor combinations is shown. It is very fast as the result of the use of Esaki diodes.

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