Browse Prior Art Database

Current Sense Circuit

IP.com Disclosure Number: IPCOM000097966D
Original Publication Date: 1961-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Harris, WM: AUTHOR

Abstract

The circuit applies an alarm pulse to output 12 or 13 upon the selection of either no drum field or more than one field, respectively. This is indicated by the amplitude of input pulses received from field drivers over line 5 and which pass through windings S of cores 1 and 2. A pulse of amplitude, indicating the selection of only one field, is sufficient to switch core 1, but insufficient to overcome the effect of bias current through winding B of core 2 and to switch such core.

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Current Sense Circuit

The circuit applies an alarm pulse to output 12 or 13 upon the selection of either no drum field or more than one field, respectively. This is indicated by the amplitude of input pulses received from field drivers over line 5 and which pass through windings S of cores 1 and 2. A pulse of amplitude, indicating the selection of only one field, is sufficient to switch core 1, but insufficient to overcome the effect of bias current through winding B of core 2 and to switch such core.

When no field is selected, and the line 5 pulse is absent, neither core is switched. Where more than one field is selected, both cores are switched. When only core 1 is switched, the resulting output pulse is applied to the 1 input of only FF3 to set it in state 1. Similarly, where neither core 1 nor 2 is switched, and where both cores are switched, FF's 3 and 4 remain in 0 state, and both are set to 1 state, respectively.

A later pulse on line 6 samples output gates 7 and 8, conditioned from the 0 and 1 sides, respectively, of FF's 3 and 4 to generate a pulse on output 12 or 13 of a conditioned one of gates 7 and 8. A reset pulse on line 9 passes, via amplifier 10, through windings R of cores 1 and 2 to reset the cores. It also passes through delay line 11 to reset FF's 3 and 4 to 0 state in anticipation of the next line 5 input pulse.

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