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Bistable Multiar Circuit

IP.com Disclosure Number: IPCOM000097970D
Original Publication Date: 1961-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Horton, RL: AUTHOR

Abstract

The bistable multiar circuit is capable of detecting the level of alternately positive and negative voltage ramps.

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Bistable Multiar Circuit

The bistable multiar circuit is capable of detecting the level of alternately positive and negative voltage ramps.

The input voltage is connected through two parallel diodes 11, 21 and the windings 12a, 22a of two regenerative transformers 12, 22 to the respective bases of two complementary transistors 13, 23. The combination of diode 11, transformer 12 and transistor 13 forms the positive multiar. Input diode 11 is biased by +Vref so that current flows through the transformer winding 12a only when the input voltage exceeds +Vref. The transformer 12, a second winding 12b of which is connected in the emitter circuit of the transistor 13, is provided to regenerate the turnoff action of 13.

Second input diode 21, regenerative transformer 22 and transistor 23 are similarly connected to form the negative multiar. This is triggered when the input voltage becomes more negative than the negative reference level -Vref. The collector of transistor 23 is connected back to transistor 13. When 23 is cut off, transistor 13 is rendered conducting. The collector of 13 is connected through an emitter follower circuit, comprising a third transistor 33, to the emitter of transistor
23. The second transistor is rendered conducting when transistor 13 is cut off.

Outputs A...D from the circuit are provided. D.C. outputs A and B are taken from the collectors of either of transistors 13, 23. These outputs provide an indication of whether the last voltage to exce...