Browse Prior Art Database

Register Input-Output Gate

IP.com Disclosure Number: IPCOM000097974D
Original Publication Date: 1961-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Weiss, L: AUTHOR

Abstract

The circuit performs the dual function of gating information either into or out of a register.

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Register Input-Output Gate

The circuit performs the dual function of gating information either into or out of a register.

The information set in register 10, by energizing a register neon 1 and associated photocell A, is transferred to the bus by energizing gating neon 2. This causes photocell B to go to the low resistance state. The information is transferred from the bus to register 11 by turning on gating neon 4. This causes corresponding photocells C and F to go to the low resistance state. Register neon 3 is turned on if a 1 (on condition of a register neon) is stored in register 10 due to the circuit through photocells C, B and A to B+. If a 0 (off condition of a register neon) is stored in register 10, there is no low resistance path through which to turn on register neon 3. Associated with register neon 3, are photocells D and E. Photocell D forms a latch circuit so that upon turning the gating neon 4 off, the register neon 3 maintains its state. Photocell E is used for readout purposes.

To transfer the information out of register 11, gating neon 4 is again energized to gate the information to the bus and thence to any other register. To gate the information into register 12, gating neon 6 is energized which changes photocell G to the low resistance state. If a 1 is in register 11, then photocell E is in the low resistance state. B+ is available through photocells E, F and G to turn on register neon 5 and set a 1 in register 12. If a 0 is stored in regist...