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Low Power Dissipating Driver

IP.com Disclosure Number: IPCOM000098003D
Original Publication Date: 1961-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

Trampel, KM: AUTHOR

Abstract

This driver provides well-defined, powered output signals with relatively low power dissipation in the circuit when it is either on or off.

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Low Power Dissipating Driver

This driver provides well-defined, powered output signals with relatively low power dissipation in the circuit when it is either on or off.

Input transistor T1 is connected in grounded-emitter configuration to supply - V2 through resistor R3. Input signals having a predetermined swing, typically V to -V3 for input transistors of the PNP type, are supplied to the T1 base through resistor R1. Supply +V1 and resistor R2 connect to the T1 base to normally bias T1 non-conducting. The T1 output is taken at the collector. Transistor T2, of the same conductivity type as T1, is connected in common emitter configuration, the collector output connecting to the T1 collector to form a common output. Supply -V3 provides the input to T2 through the emitter. The T2 base is connected through resistor R4 to supply +V2. Normally, T2 is on, due to -V2 being more negative than -V3. Thus, for an input signal level of V, T1 is off while T2 is on. The output signal level appearing at the T1 and T2 collectors is the emitter potential of T2, namely -V3.

When the input signal is -V3 turning T1 on, the T1 collector rises toward ground which forwardly biases the collector-base junction of T2. Since the T2 base approaches ground, the emitter-base junction of T2 is reversely biased which turns T2 off. The output voltage signal level, as a result, is ground or 0 for an input signal -V3.

The circuit provides well-defined, transistor powered output levels of 0 and - V...