Browse Prior Art Database

Data Transmission Checking

IP.com Disclosure Number: IPCOM000098118D
Original Publication Date: 1960-Feb-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Adams, EV: AUTHOR

Abstract

The circuit performs data transmission checking by comparison of the bit count in a counter 1 at a transmitting location with the bit count in a counter 2 at a receiving location.

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Data Transmission Checking

The circuit performs data transmission checking by comparison of the bit count in a counter 1 at a transmitting location with the bit count in a counter 2 at a receiving location.

A predetermined number of characters N are to be transmitted from a data source 3 in a given transmission period over a line 4 for use in a receiver 5 and, for the illustrated circuit, each character must consist of at least one bit, but may have two or three bits.

The counter 1 is preset to the number N. During transmission of each character, character bit signals are fed to the counter 1 through logical AND and OR circuits numbered 6 through 14, and are gated in by timing signals on lines 15 and 16. The logical circuits are arranged to pass all bits in excess of one for each character, the first bit of each character having been preset into the counter.

All bits are transmitted serially over the line 4 to the receiver 5 and also through a line 17 to the counter 2 to record the total number of bits transmitted. At the end of the given transmission period the contents of the counters 1 and 2 are compared. Loss of an entire character in both counters is detected by the presetting of counter 1.

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