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# Magnetic Core Logical Circuit

IP.com Disclosure Number: IPCOM000098220D
Original Publication Date: 1960-Apr-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 27K

IBM

## Related People

Kahn, AA: AUTHOR [+2]

## Abstract

A shunting technique for performing logical functions is utilized in the circuit which comprises a separate bistable magnetic core A, B, C, etc. for each logical input term involved. The logical inputs are in the form of currents I(a), I(b), I(c), etc, applied to input windings 10 on the cores. The output windings 11 of the cores A, B and C are connected in parallel to a desired load L, which may be, for example, a primary winding on another core.

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Magnetic Core Logical Circuit

A shunting technique for performing logical functions is utilized in the circuit which comprises a separate bistable magnetic core A, B, C, etc. for each logical input term involved. The logical inputs are in the form of currents I(a), I(b), I(c), etc, applied to input windings 10 on the cores. The output windings 11 of the cores A, B and C are connected in parallel to a desired load L, which may be, for example, a primary winding on another core.

All cores are initially in a reset state. The logical inputs, applied simultaneously, drive the cores to the set state and induce equal voltages in the output windings 11. If inputs are applied to less than all cores, a low impedance shunt path exists through the winding 11 of the nonactivated core, diverting current from the load.

The circuit shown is arranged to perform the logical function ABC. Assume that one of the inputs, for example I(a) is not present. The voltages induced in windings 11 of cores B and C tend to cause current to flow both through load L and through the winding 11 of core A. The impedance of winding 11 of core A is made small with respect to the load impedance so that the major portion of the current is diverted from the load. If all inputs are present, the equal voltages induced in all windings 11 prevent current flow in any path except that which includes the load L.

Input cores may be added or subtracted as required for specific functions to be performed. Complex...