Original Publication Date: 1960-Jun-01
Included in the Prior Art Database: 2005-Mar-07
The ring counter has four bistable triggers 1, 2, 3 and 4, each of which has A and B outputs. When the A output is high the trigger is off, and when the B output is high the trigger is on.
The ring counter has four bistable triggers 1, 2, 3 and 4, each of which has A and B outputs.
When the A output is high the trigger is off, and when the B output is high the trigger is on.
The triggers have a and b inputs, each fed by the output of an AND circuit such as shown in U. S. Patent 2, 580, 771. One input to each AND circuit is energized from a source of periodic pulses connected to terminal 5. The other inputs to the AND circuits are derived from the outputs of the various triggers alone or in combination. A pulse applied to the input on the low output side causes the trigger to change state.
With all the triggers off, the first pulse is applied to the AND gates associated with the trigger inputs. The AND gate is conditioned by the A output of trigger 4 to pass the first pulse and flip trigger 1 from off to on. Triggers 2, 3 and 4 do not change state with the first pulse.
The AND gate 7 passes the second pulse to the b input of trigger 2 and turns this on. Trigger 2 is the only trigger affected by the second pulse. With triggers 1 and 2 on, the third pulse passes to the b input of trigger 3 to change this from off to on.
The fourth pulse applied to terminal 5 passes to the b input of trigger 4 and turns this on. With all triggers on, the fifth pulse is applied to input 10a of AND gate 10 associated with the a input of trigger 1. Since input 10b is energized from the B output of trigger 4 which is high, the fifth pulse passes to the a input...