Browse Prior Art Database

Ring

IP.com Disclosure Number: IPCOM000098249D
Original Publication Date: 1960-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Harper, LR: AUTHOR

Abstract

The ring counter comprises bistable triggers 1, 2, 3 and 4 having A and B outputs. A trigger is on when the output at the A terminal is high and the B terminal is low. When the trigger is off, the output at the B terminal is high and the A terminal is low. Each of the inputs a and b, associated with triggers 1, 2, 3 and 4, is fed by the output of an AND circuit such as shown in U.S. Patent 2, 580, 771. One input to each AND circuit is energized from a source of periodic pulses connected to terminal 5. The other input to each AND circuit is derived from the outputs of various triggers either alone or in combination.

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Ring

The ring counter comprises bistable triggers 1, 2, 3 and 4 having A and B outputs. A trigger is on when the output at the A terminal is high and the B terminal is low. When the trigger is off, the output at the B terminal is high and the A terminal is low. Each of the inputs a and b, associated with triggers 1, 2, 3 and 4, is fed by the output of an AND circuit such as shown in U.S. Patent 2, 580, 771. One input to each AND circuit is energized from a source of periodic pulses connected to terminal 5. The other input to each AND circuit is derived from the outputs of various triggers either alone or in combination.

With all the triggers off the first pulse is applied to the AND circuits having their outputs directly connected to the trigger inputs.

The AND gate 6, connected to the a input of trigger 1, has one input connected to the B side of trigger 2. Energizing the second input to AND gate 6, with a pulse at terminal 5, causes trigger 1 to flip on, Similarly, one input to AND gate 7 is connected to the B side of trigger 3. Since the B side of trigger 3 is also high, the first pulse at terminal 5 passes through AND gate 7 to the a input of trigger 2. This changes the trigger 2 to the on state. Since one input to AND gate 8 is energized by the B side of trigger 1, which is high, the first pulse at terminal 5 passes through AND gate 8 to the a input of trigger 3 and switches it on. Trigger 4 remains off since one input to AND gate 9 is derived from the output of AND gate 10. In turn, one input to AND gate 10 is derived from the output of AND gate 11. Two inputs to AND gate 11 come from the A side of triggers 1 and 3 which are both low, preventing AND gate 11 from...