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Diode Switching Shift Register

IP.com Disclosure Number: IPCOM000098254D
Original Publication Date: 1960-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Morris, EF: AUTHOR

Abstract

The circuitry comprises one stage of a shift register utilizing diode logic in a sequential circuit. The emitter followers provide the necessary power gain and the level setters maintain proper voltage levels.

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Diode Switching Shift Register

The circuitry comprises one stage of a shift register utilizing diode logic in a sequential circuit. The emitter followers provide the necessary power gain and the level setters maintain proper voltage levels.

Assume that a 0 is being stored in the stage under consideration and that a 1 is stored in the previous stage. Under these conditions, the Y input is up and the output B is down. The Hold input bar X is up and point A is also up. When the Set input X comes up, an additional input to O(1) is established to maintain the output of the latter in its up state.

The Set pulse then drops and the Hold pulse comes up. A(6) switches to provide an up output which, through O(3), brings the output B to its 1 condition, indicative of the information entered into the stage.

If the Y input drops during the Hold pulse, indicating that a 0 is to be entered next into the stage, the rise of the Set input and the fall of the Hold input results in the fall of the outputs of both A(3) and A(4). As a consequence, point A falls. No change occurs at B, A(6) being latched by the B output. When the Set input falls and the Hold rises, however, neither A(5) nor A(6) provides an up output, and the output B falls, indicating that a 0 has been entered into the stage.

The circuit is hazard-free and there is no need for overlapping the Set and Hold pulses, nor is there necessity for a specific delay to be introduced between stages.

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