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Superconductor Ring Circuit

IP.com Disclosure Number: IPCOM000098261D
Original Publication Date: 1960-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Anderson, JL: AUTHOR

Abstract

The ring circuit includes three stages, each of which has two parallel superconductive paths. The three stages are connected in series with a current source B. The two parallel paths of Stage N extend from a terminal N7 to a terminal 17. One path includes the gate of cryotron N4 and the controls of cryotrons N6 and 14. The other path includes the controls of cryotrons N3 and N1 and the gates of cryotrons N2 and N6. A similar pair of parallel paths extends from terminal 17 to form the 1 stage and a third pair of parallel paths extends from terminal 07 to form the 0 stage of the ring. The state of each stage depends upon which of the parallel paths is carrying current.

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Superconductor Ring Circuit

The ring circuit includes three stages, each of which has two parallel superconductive paths. The three stages are connected in series with a current source B. The two parallel paths of Stage N extend from a terminal N7 to a terminal 17. One path includes the gate of cryotron N4 and the controls of cryotrons N6 and 14. The other path includes the controls of cryotrons N3 and N1 and the gates of cryotrons N2 and N6. A similar pair of parallel paths extends from terminal 17 to form the 1 stage and a third pair of parallel paths extends from terminal 07 to form the 0 stage of the ring. The state of each stage depends upon which of the parallel paths is carrying current.

The circuit is initially reset by applying a pulse to a reset terminal to drive cryotrons 04, 14 and N4 resistive so that the current is directed upward at terminals N7, 17 and 07 and each stage assumes its OFF state. A signal is then applied at the start terminal to drive a cryotron 05 in stage 0 resistive and cause the current in this stage to be shifted to the path including the gate of cryotron 04 and the controls of cryotrons 06 and N7. Stage 0 is then in its ON state.

An input pulse is then applied to the input terminal. With the gate of cryotron 01 superconductive and the gates of cryotrons 11 and N1 resistive, the input pulse is steered through the gate of cryotron 01 and the control of a cryotron 12. Cryotron 12 is driven resistive to cause the current to shift in...