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Code Translator

IP.com Disclosure Number: IPCOM000098352D
Original Publication Date: 1960-Aug-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Rauhe, ML: AUTHOR

Abstract

The circuit translates binary coded decimal data to decimal code and consists of ten ferrite cores having binary coded input lines. Each core has a decimal value output line.

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Code Translator

The circuit translates binary coded decimal data to decimal code and consists of ten ferrite cores having binary coded input lines. Each core has a decimal value output line.

Binary drivers 8D, 4D, 2D, 1D and XD are connected to drive lines 8, 4, 2, 1 and X, respectively, and set various cores to the 0 or 1 state in accordance with the following chart. The windings in a , direction are necessary to offset the XD winding in certain instances.

Decimal Value 8 4 2 1 X 0 1 1

1 0 0 0 1 1

2 0 0 1 0 1

3 0 1 1

4 1 0 0 1

5 1 0 1

6 1 1 0

7 1 1 1 0

8 1 0 0 1

9 1 1

Coincident signals on two of the drive lines set a core to its 1 state. Where only one binary signal comprises the code, for example, digit 8, the driver XD provides the coincident signal, the system being in effect a two out of five code.

Reset of the cores is effected by means of a restore line R which threads each core in a direction to reset it.

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