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Code Translator

IP.com Disclosure Number: IPCOM000098353D
Original Publication Date: 1960-Aug-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 77K

Publishing Venue

IBM

Related People

Busch, DF: AUTHOR

Abstract

A magnetic core circuit utilizing substantially non square hysteresis loop cores is provided for translating from decimal to two out of five code which is read out serial by bit and serial by digit.

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Code Translator

A magnetic core circuit utilizing substantially non square hysteresis loop cores is provided for translating from decimal to two out of five code which is read out serial by bit and serial by digit.

The primary (left hand) windings serve to pulse the magnetic cores according to a two out of five code illustrated in the lower drawing. The use of plural sets of secondary (right hand) windings permits the readout of plural multi order static storage devices.

Each magnetic core 10 represents one of ten decimal digits and has two primary windings that are coupled to the 0, 1, 2, 3 and 6 bit input lines according to a two out of five code configuration (lower drawing). The 0, 1, 2, 3 and 6 bit input lines are adapted to be individually and successively pulsed through an emitter 11. The primary windings on all cores containing the 0 bit are wired in series and connected with the 0 bit input line. The primary windings on all cores containing the 0 bit are wired in series and connected with the 1 bit input line, and so on for all of the bit inputs to each of the cores.

Each core 10 has one or more secondary windings, depending upon the number of multi order storage devices 12, 13, 14 in the system. Three secondary windings are shown on each of the cores 10, for the 0 through 9 digit order positions of the Word 1, Word 2, Word 3 storage devices 12, 13 and 14. Each of the storage devices is individually and successively coupled to an output circuit for readout by word selector emitter 15. Each order, that is, units, tens, and hundreds, etc., of the selected storage device is successively coupled for readout by digit selector 16. The storage device order common lines are coupled to their respective order positions of selector 16 through diodes 17.

Assume the value 726 is stored in storage device 12. With emitter 15 in its 1 position, contact is made with the set of secondary windings on the cores 10 which are interconnected with the decimal order positions of storage device 12. To effect a readout, the selector 16 must successively make contact with each order (units, tens, and hundreds) position. During the t...