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Magnetic Core Transfer Circuit

IP.com Disclosure Number: IPCOM000098359D
Original Publication Date: 1960-Aug-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Kahn, AA: AUTHOR

Abstract

A magnetic signal transfer stage suitable for use in logical circuitry includes three square hysteresis loop cores.

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Magnetic Core Transfer Circuit

A magnetic signal transfer stage suitable for use in logical circuitry includes three square hysteresis loop cores.

A positive input pulse at terminal 10 of transistor 11 renders it conductive, switching cores 12 and 13 from the 0 to 1 states. Windings 14 and 15, however, are oriented in opposing relationship and no net current flows in the loop coupling the three cores. A pulse applied to winding 16 of core 13 sets this core back to its 0 state, core 12 halfway back to its 0 state, and core 17 halfway to its 1 state. A pulse applied to winding 18 of core 17 to set this core back to its 0 state provides an output pulse at terminals 19. This latter pulse also resets core 12 completely back to its 0 state and the circuit is in the initial condition.

By using various input winding configurations and manipulating the application of pulses to windings 16 and 18, different logical functions can be performed.

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