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Shift Register And Ring

IP.com Disclosure Number: IPCOM000098391D
Original Publication Date: 1960-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Earle, J: AUTHOR

Abstract

The circuit may be used either as a counting ring or a two-stage per bit shift register. Four stages are shown, each including three NOR blocks which perform the STROKE function. That is, an output signal is provided by a block when any one or more of the input signals is absent. A positive sign represents the presence of a signal. A negative sign represents the absence of a signal.

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Shift Register And Ring

The circuit may be used either as a counting ring or a two-stage per bit shift register. Four stages are shown, each including three NOR blocks which perform the STROKE function. That is, an output signal is provided by a block when any one or more of the input signals is absent. A positive sign represents the presence of a signal. A negative sign represents the absence of a signal.

Complementary shift signals are applied to the S and bar S terminals of each stage. Assuming the polarity at a 1 points in the circuit to be initially as shown, a negative input is indicative of a logical 1 applied to the input terminal causing the output of NOR 3 to go positive. The output from 3 is fed back to an input of NOR 2 causing the output of the latter to go negative. NOR's 2 and 3 form a latch circuit which is now in the set state (the polarity of their outputs as shown being arbitrarily called the reset state). With the output of NOR 3 positive, a positive shift signal applied to the bar S terminal causes the output of NOR 4 to go negative. The negative output from NOR 4 sets the latch comprised of NOR's 5 and 6 in the same manner as the negative input to NOR 3 sets the latch including NOR's 2 and 3. With the latch consisting of 5 and 6 in the set state, the negative output of NOR 5 is fed back to the input of NOR 2. This changes the output of 2 to its positive level and resets the latch consisting of NOR's 2 and 3. Thus, the logical 1 introduced at...